What would you do with a 1TByte memory chip?

Though CSW rarely covers technology developments specifically, some of them are likely to have a direct bearing on how cloud services develop and what they can achieve for users in the future. As an example, take the notion of having Terabyte scale memory arrays on a postage stamp size chip.

This is now becoming highly probable, and is likely to hit the streets in the near to medium-term future. Santa Clara-based Crossbar, Inc., a start-up company pioneering 3D Resistive RAM (RRAM) technology, has just disclosed further details behind its non-volatile RRAM technology.

The company announced that it has demonstrated pre-production 1MByte arrays using its patented “1TnR” (1 Transistor driving n Resistive memory cells) selectivity for read/write operations, representing a critical milestone on the road to commercialising Terabyte memory chips.

These are the first samples of the technology in physical form and are, therefore, somewhat akin to the days when cars were preceded by men carrying red flags to restrict their speed. In that context, a 1MByte memory array is sure to be a drop in the ocean of what will be possible.

The 1TnR technology makes it possible for a single transistor to manage a very large number of interconnected memory cells, enabling very high capacity solid-state storage. Other memories utilising passive cross-point architectures, such as Resistive RAM, PCM (Phase Change Memory) and neuromorphic systems, experience unintended electrical current when accessing high density storage due to a phenomenon called `sneak path current’.

Until now, these memories have not been able to access data and have consumed excessive power, making dense memory configurations impractical. For the past decade, many of the world’s experts have attempted to solve this issue, but with limited success. Crossbar is the first company to deliver a solution to this industry-wide problem by enabling a single transistor to drive over 2,000 memory cells with very low power, producing super-dense Crossbar RRAM semiconductor memories.

“Crossbar has broken through traditional boundaries with its innovative and patented 3D RRAM technology,” said George Minassian, CEO, Crossbar Inc. “With 1TnR, companies will realise the dream of extremely dense, highly reliable, and high performance solid state storage. It’s truly ground breaking and has the potential to redefine what’s possible in enterprise storage and high-capacity non-volatile SoC memories.”

According to IBM1, 2.5 Exabytes - or 2.5 billion Gigabytes (GB) - of data was generated every day in 2012. All of this data needs to be stored and accessed quickly, at low power, and in a very compact space. Enterprises and service providers struggle with managing today’s storage systems using aging disk-drive technologies.

Storage systems must be re-architected using solid-state storage technologies. Hybrid, or all Flash, storage solutions are gaining momentum, but the majority of the enterprise storage market still relies on disk drive technologies as a core part of their architectures, for cost, available capacities and reliability concerns.

The true transformation to next generation high capacity storage systems will require a revolutionary new approach to solid-state storage devices and their interconnected processors. This transformation will enable hundreds of terabytes, in a small form factor, to be accessed at high speed, high throughput and high IOPS (input/output operations per second), while consuming less power at lower cost.

It also solves an economic problem of new semiconductor technologies – the extreme high cost of new production processes. Crossbar’s RRAM, however, can be stacked in 3D directly on top of standard CMOS wafers, making it very cost effective to manufacture.

Like the UK’s increasingly dominant processor technology developer, ARM, Crossbar will not be manufacturing the memory chips itself. Instead it is currently finalising agreements with several leading global semiconductor companies and plans to announce its first licensing agreements with customers shortly.

As food for thought on what might be possible, add this news to the thoughts put forward by Tibco CTO, Matt Quinn on the move towards simple servers designed to run a single function or process at a time. The combination of a single chip processor system and a single chip Terabyte memory could produce an extremely powerful, matchbox-sized (or smaller) server. Then, of course, there is the potential impact such devices could have on in-memory processing architectures such as SAP’s HANA.

The potential of the power this could give to cloud delivery systems is indeed significant, and worth keeping an eye on.